Integrated Circuit (IC) technology has developed to a point where a large number of complete circuits can be manufactured on the same semiconductor wafer using planar technology. The circuits are typically incorporated onto the wafer using photolithographic techniques. Each circuit can contain a large number of components such as transistors, diodes, resistors, capacitors, etc., which are electrically interconnected in preselected arrangements. After the circuit components are formed on the wafer, the wafer is tested and diced into individual chips comprising selected arrays of circuits, which are further processed and encapsulated into memory, logic or other ICs.
Photolithographic technology is widely used for forming the circuit patterns on the semiconductor wafers where good resolution and high yield are required. Using optical stepping techniques, the patterns initially formed on an optical mask substrate can be transferred optically onto a photoresist layer of a wafer by a step and repeat method. The step and repeat method comprises moving the mask, which contains the pattern for a portion of the wafer, to an unexposed section of the wafer and using electromagnetic radiation to image the mask pattern onto the wafer. After the pattern is imaged, the wafer is moved and the exposure is repeated. The step and repeat method for each photolithographic step continues until the entire wafer has been exposed.
The original photolithographic techniques used a photoresist layer over the wafer and ultraviolet or natural light to expose the patterns on the wafer. However, ultraviolet and natural light techniques have resolution limitations. The resolution ultimately obtained in the resist is limited by, among other factors, the wavelength of the incident light.
In part because of this limitation, X-ray lithography was developed to take advantage of the shorter wavelengths of the soft X-rays to expose appropriate patterns in the resists. The wavelength of the X-rays generally range from about 0.1 to 1.0 nanometers, which significantly improves the resolution and circuit yield per wafer associated with lithography.
During X-ray lithography, an X-ray source such as a synchrotron is used to direct an intense collimated beam of X-rays through an X-ray mask overlying a photoresist layer of a semiconductor wafer. The mask includes a central, X-ray transparent region which contains selected patterns formed of X-ray absorbing material. The X-rays expose patterns on the underlying photoresist layer that correspond to the X-ray absorbing material patterns.
To form the X-ray mask for use in X-ray lithography, a flat wafer formed from X-ray opaque material, e.g., silicon, is used as a substrate. The substrate has a central region etched to a thin tensile membrane using conventional etching techniques, e.g. diffusing an appropriate dopant into the substrate as an etch-stop. The substrate is bonded to a support ring to provide support and stability for the mask. An X-ray absorbing material, e.g., gold, is then selectively deposited on the upper surface of the wafer in the central region in an appropriate circuit pattern by techniques such as electroplating.
In an alternate embodiment, there is grown on the surface of the wafer a thin layer of silicon carbide, silicon nitride or diamond, and the membrane is formed by etching the wafer substrate to the grown layer and forming the X-ray absorbing patterns on this layer.
Henceforth the term membrane will be used to refer to the region on the wafer which is X-ray transparent and supports the X-ray opaque pattern, regardless of the method used to create such region.
The finished mask is brought proximate to a positive-acting or negative-acting resist-covered semiconductor wafer, and X-rays are applied to expose corresponding resist patterns on the underlying semiconductor wafer.
Currently, the membrane size in x-ray masks is tailored to the particular chip size for which the mask is intended. As a result a manufacturer of chips must stock a large variety of membrane containing substrates for the different size membranes he may need. Substrates having universal or standardized membrane sizes sufficiently large to accommodate all chip sizes would be highly desirable, and some have been tried albeit with limited success.
The problem has been that such universal size membrane is by necessity large to accommodate the different size patterns for different size chips. The use of such large membranes, however, requires the use of shutters associated with the exposure equipment to prevent unwanted exposure of adjacent chips. Such shutters are cumbersome to use, requiring test pre-exposures to determine the shielded area, and are not always completely effective in preventing at least some irradiation of the non image membrane area and areas adjacent to the desired target area. In addition, partial irradiation of the membrane over time results in increased mask distortion due to radiation damage.